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Post Silicon Validation Engineer


This is a Contract position in Ottawa, ON posted July 6, 2024.

We Are:

The Silicon Design group is a diverse team of world class silicon design, verification and validation experts. We have 100+ years of cumulative hands-on experience in architecture, logic design, verification, physical design, emulation and firmware. We use the latest silicon technologies and processes to help our clients create well-designed solutions to highly complex challenges. We are designing and developing next-generation, high performance SoCs, supporting our clients in their drive to deliver their product vision to their users. We are involved in all aspects of chip design from definition and architecture through to verification and signoff. Accenture Consultants are true “Silicon to SW” Partners, allowing a new breed of companies in the semiconductor ecosystem to innovate in an unparalleled time to market.

You Are:

Responsible for designing and validating the digital chip SOCs for communications via Low Earth Orbit satellites and gateways. This is a unique opportunity to be a part of a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to design and validate modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies. We are looking for contributions in the Austin lab to support the main modem chip's production.

In this role you will:

  • Develop and use infrastructure for running tests and metrics collection on silicon
  • Develop and execute post-silicon tests (to provided plan) by running SW on silicon, leveraging simulation tests if applicable.
  • Be responsible for debug support for complex sightings, booting, silicon bring-up and device characterization across different PVT corners.
  • Support the ASIC and downstream software teams in key activities requiring lab work
  • Contribute to future silicon development with learnings and optimizations from silicon based debug activities
  • Regularly audit silicon inventory and ensure security requirements are complied with